1. Field of the Invention
The present invention relates to a semiconductor chip having a monitor circuit for finding a critical path delay characteristic of a target circuit subjected by power supply voltage control, more particularly relates to technology for adaptively controlling a power supply voltage supplied to a target circuit LSI so as to reduce the power consumption.
2. Description of the Related Art
In recent years, in semiconductor circuits, it has been attempted to lower the power supply voltage so as to lower the power consumption. The reason is that an AC component of the consumed power of a semiconductor integrated circuit (LSI) is proportional to the square of the power supply voltage (V2), so lowering the power supply voltage would be the most effective for lowering the power consumption of an LSI.
From such a viewpoint, in recent years, the method of dynamically controlling the power supply voltage with respect to the operating frequency of the LSI, process variations, and temperature changes so as to adaptively supply the minimum voltage enabling LSI operation has been reported.
As an example of realization of such adaptive power supply voltage control, it is known to mount a replica circuit for imitating a delay corresponding to the critical path of a target circuit on the same chip as the target circuit subjected by the power supply voltage control (see for example Japanese Unexamined Patent Publication (Kokai) No. 2000-216338, Japanese Unexamined Patent Publication (Kokai) No. 2000-295084, and Japanese Unexamined Patent Publication (Kokai) No. 2002-100967).
In those methods, the period of the clock signal supplied to the target circuit and the delay value of the replica circuit are compared and the power supply voltage is controlled so that the delay value of the replica circuit fits in an operation clock cycle.
Summarizing the disadvantages to be solved by the invention, usually, produced LSIs feature various variations in characteristics. For example, individual LSIs will differ in the relationship between the power supply voltage Vdd supplied to the LSIs and the maximum clock frequency fclk-max at which the operation of the LSIs is guaranteed.
FIG. 6 is a graph of examples of the relationship between the power supply voltage Vdd and the maximum clock frequency fclk-max. In FIG. 6, an abscissa indicates the power supply voltage Vdd, and an ordinate indicates the maximum clock frequency fclk-max.
A curve C1 shows the characteristic of a high speed LSI having the highest operating speed within the range of variation of characteristics. A curve C3 shows the characteristic of a low speed LSI having the lowest operation speed in this range of variation. A curve C2 shows the representative characteristic in this range of variation.
As shown in FIG. 6, in general, the maximum clock frequency fclk of a circuit tends to rise as the power supply voltage Vdd becomes higher. For this reason, when the same power supply voltage is given, an LSI having the characteristic of the curve C1 can be operated at a high speed at a clock frequency higher than LSIs having the characteristics of the curves C2 and C3.
When viewing this relationship for the same clock frequency, an LSI able to perform high speed operation becomes able to perform the operation at a power supply voltage lower than an LSI of a low speed. For example, in FIG. 6, in the case of a clock frequency f1, an LSI having the characteristic of the curve C3 requires a power supply voltage larger than the voltage V3 at the minimum, but LSIs having the characteristics of the curves C1 and C2 can operate at power supply voltages of as low as the voltages V1 and V2 smaller than that.
In general, since LSIs have such variations in characteristic, usually, in any sample, the operation of the LSI is guaranteed by supplying a power supply voltage the same as the voltage V3 or higher in a fixed manner.
As opposed to this, according to the above mentioned technique of controlling the power supply voltage in accordance with the delay characteristic of the target circuit as determined by the replica circuit, the power supply voltage of an LSI having a high speed characteristic can be suppressed lower than the power supply voltage of an LSI having a low speed characteristic. Therefore, the power consumption can be reduced further in comparison with the method of supplying a fixed power supply voltage.
Along with the reduction in the design rule and the increase in wafer size in recent years, however, not only the variation between different semiconductor wafers and the variation in the same wafer, but also local variation of characteristics in the same chip have become conspicuous. Namely, even in the same chip, non-ignorable deviations occur in the characteristics of transistors formed at different positions due to minute fluctuations in the production conditions.
Such variation of characteristics in the same chip occurs also between the replica circuit and the target circuit. Therefore, when controlling the power supply voltage by using a replica circuit, it is necessary to consider the amount of such variation in characteristics.
FIG. 7 is a graph illustrating a range of operation power supply voltage taking into account a local difference of characteristics between the target circuit and the replica circuit.
The range of power supply voltage in which normal operation is guaranteed in a target circuit covered by power supply voltage control becomes a range from the low limit voltage V1l to the high limit voltage V1h if considering only local variation of characteristics of the target circuit itself. Contrary to this, the range of power supply voltage when considering the local variation of characteristics of the replica circuit as well becomes a range from the low limit voltage Vrl to the high limit voltage Vrh, that is, is shifted to the high voltage side in comparison with the range from the low limit voltage V1l to the high limit voltage V1h. To prevent malfunctions in the target circuit due to shortage of the supplied voltage, it is necessary to set the low limit voltage Vrl to a voltage the same as the high limit voltage Vlh or higher.
FIG. 8 is a graph illustrating the range of operating power supply voltage taking into consideration the local difference of characteristics between the target circuit covered by the power supply voltage control and the replica circuit for LSIs having characteristics of the curves C1 to C3 shown in FIG. 6.
The voltage V3 indicates a power supply voltage required for normally operation of the target circuit of the LSI having the lowest speed characteristic at the clock frequency f1. When using this circuit while fixing the clock signal at the frequency f1, by supplying even the power supply voltage of this voltage v3, normal operation of the target circuit is guaranteed. In the example of FIG. 8, in the LSIs from the middle speed to the high speed having the characteristics of the curves C1 and C2, even if taking into consideration the local difference of characteristics, the maximum value Vrh of the power supply voltage determined from the delay characteristic of the replica circuit will never exceed this voltage V3.
When the LSI has a relatively low speed characteristic, however, the maximum value Vrh of the power supply voltage determined from the delay characteristic of the replica circuit may become larger than the voltage V3. In such a case, in comparison with the method of supplying a fixed power supply voltage of the voltage V3, the disadvantage arises that the power consumption rather increases.
For example, in the case of the lowest speed LSI having the characteristic of the curve C3, an excess voltage (Vrh–Vrl) corresponding to the variation of characteristics of the replica circuit is added to the voltage V3, therefore a wasteful voltage loss due to this excess voltage is induced.